[   17.228632] ccs 16-001a: binning 2x1
[   17.228697] ccs 16-001a: binning 2x2
[   17.228700] ccs 16-001a: binning 2x4
[   17.228702] ccs 16-001a: binning 4x4
[   17.228716] ccs 16-001a: data_format_model_type 1
[   17.229066] ccs 16-001a: pixel order 1 (RGGB)
[   17.229069] ccs 16-001a: 0: bpp 8, compressed 8
[   17.229072] ccs 16-001a: jolly good! 20
[   17.229075] ccs 16-001a: 1: bpp 10, compressed 8
[   17.229077] ccs 16-001a: jolly good! 16
[   17.229079] ccs 16-001a: 2: bpp 10, compressed 10
[   17.229082] ccs 16-001a: jolly good! 12
[   17.229094] ccs 16-001a: 3: bpp 0, compressed 0
[   17.229096] ccs 16-001a: 4: bpp 0, compressed 0
[   17.229098] ccs 16-001a: 5: bpp 0, compressed 0
[   17.229100] ccs 16-001a: 6: bpp 0, compressed 0
[   17.229102] ccs 16-001a: 7: bpp 0, compressed 0
[   17.229111] ccs 16-001a: PLL flags lane-speed ext-ip-pll-divider fifo-derating fifo-overrating dual-pll
[   17.229116] ccs 16-001a: vt_lanes: 3
[   17.229119] ccs 16-001a: op_lanes: 3
[   17.229121] ccs 16-001a: binning: 1x1
[   17.229123] ccs 16-001a: min / max op_pre_pll_clk_div: 1 / 4
[   17.229126] ccs 16-001a: pre-pll check: min / max op_pre_pll_clk_div: 2 / 4
[   17.229129] ccs 16-001a: mul 139 / div 2
[   17.229131] ccs 16-001a: pll_op check: min / max op_pre_pll_clk_div: 1 / 4
[   17.229134] ccs 16-001a: op_pre_pll_clk_div 1
[   17.229136] ccs 16-001a: more_mul_max: max_op_pll_multiplier check: 2
[   17.229138] ccs 16-001a: more_mul_max: max_pll_op_clk_freq_hz check: 0
[   17.229140] ccs 16-001a: more_mul_max: max_op_sys_clk_div check: 0
[   17.229142] ccs 16-001a: more_mul_max: min_pll_multiplier check: 0
[   17.229144] ccs 16-001a: more_mul_min: min_op_pll_op_clk_freq_hz check: 0
[   17.229147] ccs 16-001a: more_mul_min: min_op_pll_multiplier check: 1
[   17.229148] ccs 16-001a: unable to compute more_mul_min and more_mul_max
[   17.229150] ccs 16-001a: op_pre_pll_clk_div 2
[   17.229152] ccs 16-001a: more_mul_max: max_op_pll_multiplier check: 2
[   17.229154] ccs 16-001a: more_mul_max: max_pll_op_clk_freq_hz check: 1
[   17.229156] ccs 16-001a: more_mul_max: max_op_sys_clk_div check: 1
[   17.229157] ccs 16-001a: more_mul_max: min_pll_multiplier check: 1
[   17.229159] ccs 16-001a: more_mul_min: min_op_pll_op_clk_freq_hz check: 1
[   17.229161] ccs 16-001a: more_mul_min: min_op_pll_multiplier check: 1
[   17.229163] ccs 16-001a: more_mul_factor: 1
[   17.229165] ccs 16-001a: more_mul_factor: min_op_sys_clk_div: 1
[   17.229167] ccs 16-001a: final more_mul: 1
[   17.229170] ccs 16-001a: op_sys_clk_div: 1
[   17.229172] ccs 16-001a: op_pix_clk_div: 4
[   17.229175] ccs 16-001a: op_pix_clk_freq_hz out of bounds: 417000000 (15625000--287500000)
[   17.229179] ccs 16-001a: op_pre_pll_clk_div 3
[   17.229180] ccs 16-001a: more_mul_max: max_op_pll_multiplier check: 2
[   17.229182] ccs 16-001a: more_mul_max: max_pll_op_clk_freq_hz check: 2
[   17.229184] ccs 16-001a: more_mul_max: max_op_sys_clk_div check: 2
[   17.229186] ccs 16-001a: more_mul_max: min_pll_multiplier check: 2
[   17.229188] ccs 16-001a: more_mul_min: min_op_pll_op_clk_freq_hz check: 2
[   17.229189] ccs 16-001a: more_mul_min: min_op_pll_multiplier check: 2
[   17.229191] ccs 16-001a: more_mul_factor: 3
[   17.229193] ccs 16-001a: more_mul_factor: min_op_sys_clk_div: 3
[   17.229195] ccs 16-001a: final more_mul: 6
[   17.229197] ccs 16-001a: final more_mul is bad, max 2
[   17.229198] ccs 16-001a: op_pre_pll_clk_div 4
[   17.229200] ccs 16-001a: more_mul_max: max_op_pll_multiplier check: 2
[   17.229202] ccs 16-001a: more_mul_max: max_pll_op_clk_freq_hz check: 2
[   17.229204] ccs 16-001a: more_mul_max: max_op_sys_clk_div check: 2
[   17.229206] ccs 16-001a: more_mul_max: min_pll_multiplier check: 2
[   17.229207] ccs 16-001a: more_mul_min: min_op_pll_op_clk_freq_hz check: 2
[   17.229209] ccs 16-001a: more_mul_min: min_op_pll_multiplier check: 2
[   17.229211] ccs 16-001a: more_mul_factor: 2
[   17.229213] ccs 16-001a: more_mul_factor: min_op_sys_clk_div: 2
[   17.229215] ccs 16-001a: final more_mul: 2
[   17.229216] ccs 16-001a: op_sys_clk_div: 1
[   17.229218] ccs 16-001a: op_pix_clk_div: 4
[   17.229220] ccs 16-001a: op_pix_clk_freq_hz out of bounds: 417000000 (15625000--287500000)
[   17.229223] ccs 16-001a: unable to compute OP pre_pll divisor
[   17.229224] ccs 16-001a: link freq 834000000 Hz, bpp 10 not ok
[   17.229229] ccs 16-001a: no valid link frequencies for 10 bpp
[   17.236069] ccs 16-001a: PLL flags lane-speed ext-ip-pll-divider fifo-derating fifo-overrating dual-pll
[   17.236074] ccs 16-001a: vt_lanes: 3
[   17.236077] ccs 16-001a: op_lanes: 3
[   17.236079] ccs 16-001a: binning: 1x1
[   17.236081] ccs 16-001a: min / max op_pre_pll_clk_div: 1 / 4
[   17.236083] ccs 16-001a: pre-pll check: min / max op_pre_pll_clk_div: 2 / 4
[   17.236094] ccs 16-001a: mul 139 / div 2
[   17.236097] ccs 16-001a: pll_op check: min / max op_pre_pll_clk_div: 1 / 4
[   17.236099] ccs 16-001a: op_pre_pll_clk_div 1
[   17.236101] ccs 16-001a: more_mul_max: max_op_pll_multiplier check: 2
[   17.236103] ccs 16-001a: more_mul_max: max_pll_op_clk_freq_hz check: 0
[   17.236105] ccs 16-001a: more_mul_max: max_op_sys_clk_div check: 0
[   17.236106] ccs 16-001a: more_mul_max: min_pll_multiplier check: 0
[   17.236108] ccs 16-001a: more_mul_min: min_op_pll_op_clk_freq_hz check: 0
[   17.236110] ccs 16-001a: more_mul_min: min_op_pll_multiplier check: 1
[   17.236112] ccs 16-001a: unable to compute more_mul_min and more_mul_max
[   17.236113] ccs 16-001a: op_pre_pll_clk_div 2
[   17.236115] ccs 16-001a: more_mul_max: max_op_pll_multiplier check: 2
[   17.236117] ccs 16-001a: more_mul_max: max_pll_op_clk_freq_hz check: 1
[   17.236119] ccs 16-001a: more_mul_max: max_op_sys_clk_div check: 1
[   17.236121] ccs 16-001a: more_mul_max: min_pll_multiplier check: 1
[   17.236122] ccs 16-001a: more_mul_min: min_op_pll_op_clk_freq_hz check: 1
[   17.236124] ccs 16-001a: more_mul_min: min_op_pll_multiplier check: 1
[   17.236126] ccs 16-001a: more_mul_factor: 1
[   17.236128] ccs 16-001a: more_mul_factor: min_op_sys_clk_div: 1
[   17.236130] ccs 16-001a: final more_mul: 1
[   17.236131] ccs 16-001a: op_sys_clk_div: 1
[   17.236133] ccs 16-001a: op_pix_clk_div: 3
[   17.236135] ccs 16-001a: op_pix_clk_freq_hz out of bounds: 556000000 (15625000--287500000)
[   17.236138] ccs 16-001a: op_pre_pll_clk_div 3
[   17.236140] ccs 16-001a: more_mul_max: max_op_pll_multiplier check: 2
[   17.236141] ccs 16-001a: more_mul_max: max_pll_op_clk_freq_hz check: 2
[   17.236143] ccs 16-001a: more_mul_max: max_op_sys_clk_div check: 2
[   17.236145] ccs 16-001a: more_mul_max: min_pll_multiplier check: 2
[   17.236147] ccs 16-001a: more_mul_min: min_op_pll_op_clk_freq_hz check: 2
[   17.236149] ccs 16-001a: more_mul_min: min_op_pll_multiplier check: 2
[   17.236150] ccs 16-001a: more_mul_factor: 3
[   17.236152] ccs 16-001a: more_mul_factor: min_op_sys_clk_div: 3
[   17.236154] ccs 16-001a: final more_mul: 6
[   17.236156] ccs 16-001a: final more_mul is bad, max 2
[   17.236158] ccs 16-001a: op_pre_pll_clk_div 4
[   17.236159] ccs 16-001a: more_mul_max: max_op_pll_multiplier check: 2
[   17.236161] ccs 16-001a: more_mul_max: max_pll_op_clk_freq_hz check: 2
[   17.236163] ccs 16-001a: more_mul_max: max_op_sys_clk_div check: 2
[   17.236165] ccs 16-001a: more_mul_max: min_pll_multiplier check: 2
[   17.236166] ccs 16-001a: more_mul_min: min_op_pll_op_clk_freq_hz check: 2
[   17.236168] ccs 16-001a: more_mul_min: min_op_pll_multiplier check: 2
[   17.236170] ccs 16-001a: more_mul_factor: 2
[   17.236172] ccs 16-001a: more_mul_factor: min_op_sys_clk_div: 2
[   17.236174] ccs 16-001a: final more_mul: 2
[   17.236175] ccs 16-001a: op_sys_clk_div: 1
[   17.236177] ccs 16-001a: op_pix_clk_div: 3
[   17.236179] ccs 16-001a: op_pix_clk_freq_hz out of bounds: 556000000 (15625000--287500000)
[   17.236182] ccs 16-001a: unable to compute OP pre_pll divisor
[   17.236183] ccs 16-001a: link freq 834000000 Hz, bpp 8 not ok
[   17.236186] ccs 16-001a: no valid link frequencies for 8 bpp
[   17.242862] ccs 16-001a: PLL flags lane-speed ext-ip-pll-divider fifo-derating fifo-overrating dual-pll
[   17.242865] ccs 16-001a: vt_lanes: 3
[   17.242867] ccs 16-001a: op_lanes: 3
[   17.242869] ccs 16-001a: binning: 1x1
[   17.242871] ccs 16-001a: min / max op_pre_pll_clk_div: 1 / 4
[   17.242874] ccs 16-001a: pre-pll check: min / max op_pre_pll_clk_div: 2 / 4
[   17.242876] ccs 16-001a: mul 139 / div 2
[   17.242878] ccs 16-001a: pll_op check: min / max op_pre_pll_clk_div: 1 / 4
[   17.242880] ccs 16-001a: op_pre_pll_clk_div 1
[   17.242881] ccs 16-001a: more_mul_max: max_op_pll_multiplier check: 2
[   17.242883] ccs 16-001a: more_mul_max: max_pll_op_clk_freq_hz check: 0
[   17.242885] ccs 16-001a: more_mul_max: max_op_sys_clk_div check: 0
[   17.242887] ccs 16-001a: more_mul_max: min_pll_multiplier check: 0
[   17.242888] ccs 16-001a: more_mul_min: min_op_pll_op_clk_freq_hz check: 0
[   17.242890] ccs 16-001a: more_mul_min: min_op_pll_multiplier check: 1
[   17.242892] ccs 16-001a: unable to compute more_mul_min and more_mul_max
[   17.242894] ccs 16-001a: op_pre_pll_clk_div 2
[   17.242895] ccs 16-001a: more_mul_max: max_op_pll_multiplier check: 2
[   17.242898] ccs 16-001a: more_mul_max: max_pll_op_clk_freq_hz check: 1
[   17.242899] ccs 16-001a: more_mul_max: max_op_sys_clk_div check: 1
[   17.242901] ccs 16-001a: more_mul_max: min_pll_multiplier check: 1
[   17.242903] ccs 16-001a: more_mul_min: min_op_pll_op_clk_freq_hz check: 1
[   17.242905] ccs 16-001a: more_mul_min: min_op_pll_multiplier check: 1
[   17.242906] ccs 16-001a: more_mul_factor: 1
[   17.242908] ccs 16-001a: more_mul_factor: min_op_sys_clk_div: 1
[   17.242910] ccs 16-001a: final more_mul: 1
[   17.242912] ccs 16-001a: op_sys_clk_div: 1
[   17.242914] ccs 16-001a: op_pix_clk_div: 3
[   17.242915] ccs 16-001a: op_pix_clk_freq_hz out of bounds: 556000000 (15625000--287500000)
[   17.242918] ccs 16-001a: op_pre_pll_clk_div 3
[   17.242920] ccs 16-001a: more_mul_max: max_op_pll_multiplier check: 2
[   17.242922] ccs 16-001a: more_mul_max: max_pll_op_clk_freq_hz check: 2
[   17.242924] ccs 16-001a: more_mul_max: max_op_sys_clk_div check: 2
[   17.242925] ccs 16-001a: more_mul_max: min_pll_multiplier check: 2
[   17.242927] ccs 16-001a: more_mul_min: min_op_pll_op_clk_freq_hz check: 2
[   17.242929] ccs 16-001a: more_mul_min: min_op_pll_multiplier check: 2
[   17.242931] ccs 16-001a: more_mul_factor: 3
[   17.242932] ccs 16-001a: more_mul_factor: min_op_sys_clk_div: 3
[   17.242934] ccs 16-001a: final more_mul: 6
[   17.242936] ccs 16-001a: final more_mul is bad, max 2
[   17.242938] ccs 16-001a: op_pre_pll_clk_div 4
[   17.242940] ccs 16-001a: more_mul_max: max_op_pll_multiplier check: 2
[   17.242941] ccs 16-001a: more_mul_max: max_pll_op_clk_freq_hz check: 2
[   17.242943] ccs 16-001a: more_mul_max: max_op_sys_clk_div check: 2
[   17.242945] ccs 16-001a: more_mul_max: min_pll_multiplier check: 2
[   17.242947] ccs 16-001a: more_mul_min: min_op_pll_op_clk_freq_hz check: 2
[   17.242948] ccs 16-001a: more_mul_min: min_op_pll_multiplier check: 2
[   17.242950] ccs 16-001a: more_mul_factor: 2
[   17.242952] ccs 16-001a: more_mul_factor: min_op_sys_clk_div: 2
[   17.242954] ccs 16-001a: final more_mul: 2
[   17.242956] ccs 16-001a: op_sys_clk_div: 1
[   17.242957] ccs 16-001a: op_pix_clk_div: 3
[   17.242959] ccs 16-001a: op_pix_clk_freq_hz out of bounds: 556000000 (15625000--287500000)
[   17.242962] ccs 16-001a: unable to compute OP pre_pll divisor
[   17.242963] ccs 16-001a: link freq 834000000 Hz, bpp 8 not ok
[   17.242966] ccs 16-001a: no valid link frequencies for 8 bpp
[   17.249682] ccs 16-001a: no supported mbus code found