# imx519 1668 -rw-r--r-- 10.7 KiB View raw
                                                                                
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[   17.456557] ccs 16-001a: binning 2x1
[   17.456563] ccs 16-001a: binning 2x2
[   17.456565] ccs 16-001a: binning 2x4
[   17.456567] ccs 16-001a: binning 4x4
[   17.456583] ccs 16-001a: data_format_model_type 1
[   17.456740] ccs 16-001a: pixel order 1 (RGGB)
[   17.456743] ccs 16-001a: 0: bpp 8, compressed 8
[   17.456746] ccs 16-001a: jolly good! 20
[   17.456749] ccs 16-001a: 1: bpp 10, compressed 8
[   17.456751] ccs 16-001a: jolly good! 16
[   17.456753] ccs 16-001a: 2: bpp 10, compressed 10
[   17.456756] ccs 16-001a: jolly good! 12
[   17.456757] ccs 16-001a: 3: bpp 0, compressed 0
[   17.456760] ccs 16-001a: 4: bpp 0, compressed 0
[   17.456762] ccs 16-001a: 5: bpp 0, compressed 0
[   17.456764] ccs 16-001a: 6: bpp 0, compressed 0
[   17.456766] ccs 16-001a: 7: bpp 0, compressed 0
[   17.456774] ccs 16-001a: PLL flags lane-speed ext-ip-pll-divider fifo-derating fifo-overrating dual-pll
[   17.456779] ccs 16-001a: vt_lanes: 3
[   17.456781] ccs 16-001a: op_lanes: 3
[   17.456783] ccs 16-001a: binning: 1x1
[   17.456786] ccs 16-001a: min / max op_pre_pll_clk_div: 1 / 4
[   17.456788] ccs 16-001a: pre-pll check: min / max op_pre_pll_clk_div: 2 / 4
[   17.456790] ccs 16-001a: mul 139 / div 1
[   17.456793] ccs 16-001a: pll_op check: min / max op_pre_pll_clk_div: 1 / 4
[   17.456795] ccs 16-001a: op_pre_pll_clk_div 1
[   17.456797] ccs 16-001a: more_mul_max: max_op_pll_multiplier check: 2
[   17.456799] ccs 16-001a: more_mul_max: max_pll_op_clk_freq_hz check: 0
[   17.456801] ccs 16-001a: more_mul_max: max_op_sys_clk_div check: 0
[   17.456803] ccs 16-001a: more_mul_max: min_pll_multiplier check: 0
[   17.456805] ccs 16-001a: more_mul_min: min_op_pll_op_clk_freq_hz check: 0
[   17.456808] ccs 16-001a: more_mul_min: min_op_pll_multiplier check: 1
[   17.456810] ccs 16-001a: unable to compute more_mul_min and more_mul_max
[   17.456811] ccs 16-001a: op_pre_pll_clk_div 2
[   17.456813] ccs 16-001a: more_mul_max: max_op_pll_multiplier check: 2
[   17.456815] ccs 16-001a: more_mul_max: max_pll_op_clk_freq_hz check: 1
[   17.456817] ccs 16-001a: more_mul_max: max_op_sys_clk_div check: 1
[   17.456819] ccs 16-001a: more_mul_max: min_pll_multiplier check: 1
[   17.456820] ccs 16-001a: more_mul_min: min_op_pll_op_clk_freq_hz check: 1
[   17.456822] ccs 16-001a: more_mul_min: min_op_pll_multiplier check: 1
[   17.456824] ccs 16-001a: more_mul_factor: 2
[   17.456826] ccs 16-001a: more_mul_factor: min_op_sys_clk_div: 2
[   17.456828] ccs 16-001a: final more_mul: 2
[   17.456830] ccs 16-001a: final more_mul is bad, max 1
[   17.456831] ccs 16-001a: op_pre_pll_clk_div 3
[   17.456833] ccs 16-001a: more_mul_max: max_op_pll_multiplier check: 2
[   17.456835] ccs 16-001a: more_mul_max: max_pll_op_clk_freq_hz check: 2
[   17.456837] ccs 16-001a: more_mul_max: max_op_sys_clk_div check: 2
[   17.456838] ccs 16-001a: more_mul_max: min_pll_multiplier check: 2
[   17.456840] ccs 16-001a: more_mul_min: min_op_pll_op_clk_freq_hz check: 2
[   17.456842] ccs 16-001a: more_mul_min: min_op_pll_multiplier check: 2
[   17.456844] ccs 16-001a: more_mul_factor: 3
[   17.456846] ccs 16-001a: more_mul_factor: min_op_sys_clk_div: 3
[   17.456847] ccs 16-001a: final more_mul: 6
[   17.456849] ccs 16-001a: final more_mul is bad, max 2
[   17.456851] ccs 16-001a: op_pre_pll_clk_div 4
[   17.456853] ccs 16-001a: more_mul_max: max_op_pll_multiplier check: 2
[   17.456855] ccs 16-001a: more_mul_max: max_pll_op_clk_freq_hz check: 2
[   17.456856] ccs 16-001a: more_mul_max: max_op_sys_clk_div check: 2
[   17.456858] ccs 16-001a: more_mul_max: min_pll_multiplier check: 2
[   17.456860] ccs 16-001a: more_mul_min: min_op_pll_op_clk_freq_hz check: 2
[   17.456862] ccs 16-001a: more_mul_min: min_op_pll_multiplier check: 2
[   17.456863] ccs 16-001a: more_mul_factor: 4
[   17.456865] ccs 16-001a: more_mul_factor: min_op_sys_clk_div: 4
[   17.456867] ccs 16-001a: final more_mul: 4
[   17.456869] ccs 16-001a: final more_mul is bad, max 2
[   17.456871] ccs 16-001a: unable to compute OP pre_pll divisor
[   17.456872] ccs 16-001a: link freq 1668000000 Hz, bpp 10 not ok
[   17.456876] ccs 16-001a: no valid link frequencies for 10 bpp
[   17.463717] ccs 16-001a: PLL flags lane-speed ext-ip-pll-divider fifo-derating fifo-overrating dual-pll
[   17.463721] ccs 16-001a: vt_lanes: 3
[   17.463723] ccs 16-001a: op_lanes: 3
[   17.463725] ccs 16-001a: binning: 1x1
[   17.463727] ccs 16-001a: min / max op_pre_pll_clk_div: 1 / 4
[   17.463729] ccs 16-001a: pre-pll check: min / max op_pre_pll_clk_div: 2 / 4
[   17.463731] ccs 16-001a: mul 139 / div 1
[   17.463733] ccs 16-001a: pll_op check: min / max op_pre_pll_clk_div: 1 / 4
[   17.463735] ccs 16-001a: op_pre_pll_clk_div 1
[   17.463736] ccs 16-001a: more_mul_max: max_op_pll_multiplier check: 2
[   17.463738] ccs 16-001a: more_mul_max: max_pll_op_clk_freq_hz check: 0
[   17.463740] ccs 16-001a: more_mul_max: max_op_sys_clk_div check: 0
[   17.463742] ccs 16-001a: more_mul_max: min_pll_multiplier check: 0
[   17.463744] ccs 16-001a: more_mul_min: min_op_pll_op_clk_freq_hz check: 0
[   17.463745] ccs 16-001a: more_mul_min: min_op_pll_multiplier check: 1
[   17.463747] ccs 16-001a: unable to compute more_mul_min and more_mul_max
[   17.463749] ccs 16-001a: op_pre_pll_clk_div 2
[   17.463751] ccs 16-001a: more_mul_max: max_op_pll_multiplier check: 2
[   17.463752] ccs 16-001a: more_mul_max: max_pll_op_clk_freq_hz check: 1
[   17.463754] ccs 16-001a: more_mul_max: max_op_sys_clk_div check: 1
[   17.463756] ccs 16-001a: more_mul_max: min_pll_multiplier check: 1
[   17.463758] ccs 16-001a: more_mul_min: min_op_pll_op_clk_freq_hz check: 1
[   17.463760] ccs 16-001a: more_mul_min: min_op_pll_multiplier check: 1
[   17.463761] ccs 16-001a: more_mul_factor: 2
[   17.463763] ccs 16-001a: more_mul_factor: min_op_sys_clk_div: 2
[   17.463765] ccs 16-001a: final more_mul: 2
[   17.463767] ccs 16-001a: final more_mul is bad, max 1
[   17.463769] ccs 16-001a: op_pre_pll_clk_div 3
[   17.463770] ccs 16-001a: more_mul_max: max_op_pll_multiplier check: 2
[   17.463772] ccs 16-001a: more_mul_max: max_pll_op_clk_freq_hz check: 2
[   17.463774] ccs 16-001a: more_mul_max: max_op_sys_clk_div check: 2
[   17.463776] ccs 16-001a: more_mul_max: min_pll_multiplier check: 2
[   17.463777] ccs 16-001a: more_mul_min: min_op_pll_op_clk_freq_hz check: 2
[   17.463779] ccs 16-001a: more_mul_min: min_op_pll_multiplier check: 2
[   17.463781] ccs 16-001a: more_mul_factor: 3
[   17.463783] ccs 16-001a: more_mul_factor: min_op_sys_clk_div: 3
[   17.463785] ccs 16-001a: final more_mul: 6
[   17.463786] ccs 16-001a: final more_mul is bad, max 2
[   17.463788] ccs 16-001a: op_pre_pll_clk_div 4
[   17.463790] ccs 16-001a: more_mul_max: max_op_pll_multiplier check: 2
[   17.463792] ccs 16-001a: more_mul_max: max_pll_op_clk_freq_hz check: 2
[   17.463793] ccs 16-001a: more_mul_max: max_op_sys_clk_div check: 2
[   17.463795] ccs 16-001a: more_mul_max: min_pll_multiplier check: 2
[   17.463797] ccs 16-001a: more_mul_min: min_op_pll_op_clk_freq_hz check: 2
[   17.463799] ccs 16-001a: more_mul_min: min_op_pll_multiplier check: 2
[   17.463801] ccs 16-001a: more_mul_factor: 4
[   17.463802] ccs 16-001a: more_mul_factor: min_op_sys_clk_div: 4
[   17.463804] ccs 16-001a: final more_mul: 4
[   17.463806] ccs 16-001a: final more_mul is bad, max 2
[   17.463808] ccs 16-001a: unable to compute OP pre_pll divisor
[   17.463809] ccs 16-001a: link freq 1668000000 Hz, bpp 8 not ok
[   17.463812] ccs 16-001a: no valid link frequencies for 8 bpp
[   17.470508] ccs 16-001a: PLL flags lane-speed ext-ip-pll-divider fifo-derating fifo-overrating dual-pll
[   17.470520] ccs 16-001a: vt_lanes: 3
[   17.470522] ccs 16-001a: op_lanes: 3
[   17.470524] ccs 16-001a: binning: 1x1
[   17.470526] ccs 16-001a: min / max op_pre_pll_clk_div: 1 / 4
[   17.470528] ccs 16-001a: pre-pll check: min / max op_pre_pll_clk_div: 2 / 4
[   17.470530] ccs 16-001a: mul 139 / div 1
[   17.470532] ccs 16-001a: pll_op check: min / max op_pre_pll_clk_div: 1 / 4
[   17.470534] ccs 16-001a: op_pre_pll_clk_div 1
[   17.470536] ccs 16-001a: more_mul_max: max_op_pll_multiplier check: 2
[   17.470537] ccs 16-001a: more_mul_max: max_pll_op_clk_freq_hz check: 0
[   17.470539] ccs 16-001a: more_mul_max: max_op_sys_clk_div check: 0
[   17.470541] ccs 16-001a: more_mul_max: min_pll_multiplier check: 0
[   17.470543] ccs 16-001a: more_mul_min: min_op_pll_op_clk_freq_hz check: 0
[   17.470545] ccs 16-001a: more_mul_min: min_op_pll_multiplier check: 1
[   17.470546] ccs 16-001a: unable to compute more_mul_min and more_mul_max
[   17.470548] ccs 16-001a: op_pre_pll_clk_div 2
[   17.470550] ccs 16-001a: more_mul_max: max_op_pll_multiplier check: 2
[   17.470552] ccs 16-001a: more_mul_max: max_pll_op_clk_freq_hz check: 1
[   17.470554] ccs 16-001a: more_mul_max: max_op_sys_clk_div check: 1
[   17.470555] ccs 16-001a: more_mul_max: min_pll_multiplier check: 1
[   17.470557] ccs 16-001a: more_mul_min: min_op_pll_op_clk_freq_hz check: 1
[   17.470559] ccs 16-001a: more_mul_min: min_op_pll_multiplier check: 1
[   17.470561] ccs 16-001a: more_mul_factor: 2
[   17.470562] ccs 16-001a: more_mul_factor: min_op_sys_clk_div: 2
[   17.470564] ccs 16-001a: final more_mul: 2
[   17.470566] ccs 16-001a: final more_mul is bad, max 1
[   17.470568] ccs 16-001a: op_pre_pll_clk_div 3
[   17.470570] ccs 16-001a: more_mul_max: max_op_pll_multiplier check: 2
[   17.470572] ccs 16-001a: more_mul_max: max_pll_op_clk_freq_hz check: 2
[   17.470573] ccs 16-001a: more_mul_max: max_op_sys_clk_div check: 2
[   17.470575] ccs 16-001a: more_mul_max: min_pll_multiplier check: 2
[   17.470577] ccs 16-001a: more_mul_min: min_op_pll_op_clk_freq_hz check: 2
[   17.470579] ccs 16-001a: more_mul_min: min_op_pll_multiplier check: 2
[   17.470581] ccs 16-001a: more_mul_factor: 3
[   17.470582] ccs 16-001a: more_mul_factor: min_op_sys_clk_div: 3
[   17.470584] ccs 16-001a: final more_mul: 6
[   17.470586] ccs 16-001a: final more_mul is bad, max 2
[   17.470588] ccs 16-001a: op_pre_pll_clk_div 4
[   17.470590] ccs 16-001a: more_mul_max: max_op_pll_multiplier check: 2
[   17.470592] ccs 16-001a: more_mul_max: max_pll_op_clk_freq_hz check: 2
[   17.470593] ccs 16-001a: more_mul_max: max_op_sys_clk_div check: 2
[   17.470595] ccs 16-001a: more_mul_max: min_pll_multiplier check: 2
[   17.470597] ccs 16-001a: more_mul_min: min_op_pll_op_clk_freq_hz check: 2
[   17.470599] ccs 16-001a: more_mul_min: min_op_pll_multiplier check: 2
[   17.470601] ccs 16-001a: more_mul_factor: 4
[   17.470602] ccs 16-001a: more_mul_factor: min_op_sys_clk_div: 4
[   17.470604] ccs 16-001a: final more_mul: 4
[   17.470606] ccs 16-001a: final more_mul is bad, max 2
[   17.470608] ccs 16-001a: unable to compute OP pre_pll divisor
[   17.470609] ccs 16-001a: link freq 1668000000 Hz, bpp 8 not ok
[   17.470612] ccs 16-001a: no valid link frequencies for 8 bpp
[   17.477289] ccs 16-001a: no supported mbus code found